Recent comments in /f/gadgets

jjayzx t1_j09ddkj wrote

Different designs is how things have been moving forward and how they've been targeting the performance/price ratio. If the device does not require much processing power there are other processors still made on older nodes for a lower price point. The majority of pricing is in the machines, wafers and yields.

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swisstraeng t1_j09bv7d wrote

True that it's not a material, BUT there is a valid point that, such 3D ways of doing transistors are expensive to manufacture.

And we, consumers, don't like expensive things. We want performance/price most of the time.

Not a lot of us would be ready for a 4000$ CPU if it meant 30% better perfs over a 900$ CPU.

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swisstraeng t1_j09bh24 wrote

That's the thing, it is not a few atoms wide. Ask google, you'll learn something. You cannot make a transistor gate of only 5 or 10 atoms, due to quantum tunneling, but I mean, without the fancy quantum name, it just means that, there are probabilities electrons still get the energy to make the jump when we don't want them to. The gate's size is not two nanometers. It's around 40nm. Or bigger.

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swisstraeng t1_j09ahok wrote

Indeed.

1 Angstrom is 0.1nm, and it's first of all completely dumb to use non-standard units, when they could have said 100pm instead.

Intel just ran out of numbers to write, so they used the next available scale: angstrom.

But again, that's just a marketing number.

Intel calls it 18A. TSCM calls it N2, samsung calls it 2GAP. But all those fancy names are just factory processes. Ways to make silicon chips. Those processes are currently done in laboratories and being researched, and are expected to be used around 2025 for production.

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swisstraeng t1_j09a5ge wrote

Yeah, and the main issue is that, when you add layers on top of layers, you are less and less flat. And at some point you're a whole layer wrong, so you have to do long and expensive processes to try to flatten the thing again.

Cooling is partially an issue, but that's also because CPU/GPU manufacturers push their chips to their limits in an attempt to make them appear better. And end up selling stuff like RTX4090 that is clocked way too high and end up eating 600W, when it could have 90% of the performances for 300W. But hey. They're not the ones paying the power bill.

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navigationallyaided t1_j099kpb wrote

You’d be shocked - anything that requires RF, like car key fobs, gate/garage remotes and discrete power/timing/IO, chances are those components are coming from Microchip, Intersil, ST Micro, ADC and National Semiconductor. Part of the electronics shortage - plenty of the “big” chips like DRAM/NAND, CPUs/GPUs/SoCs but not enough of the supporting cast like RF/discrete power/IO/networking/timing/battery monitoring - those are all specialized ICs that don’t use the latest and greatest process tech but have an important supporting role.

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swisstraeng t1_j09967i wrote

Simply put: Engineers said they can't make it smaller, it didn't stop marketing people that thought it was a good idea.

It's as dumb as 2666Mhz ram, that in reality is clocked at 1333MHz, and 2666's proper unit of measurement is MT/s.

Why? Because DDRx ram stands for double data rate. Marketing wanted to use larger numbers because it sounded like it'd sell more ram.

They ended up confusing everyone. Again.

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Murgos- t1_j0905kj wrote

Lambda used to mean the smallest size feature that could be reliably realized in the design. At the same time you still needed margin to carry current and to resolve any imperfections.

So the smallest thing you could make might actually had a minimum requirement of 2Lambda.

I don’t do ASIC gate layout any more but I expect that when they say 7nm now or 5 or whatever they really mean that they can resolve a 7nm feature but you still need 2 or 4 lambda to actually make it work.

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g0ndsman t1_j08u6b4 wrote

I don't think the feature size of the technology is 2 nm. The performance might being line with a theoretical scaled 2 nm technology in at least some aspects, but transistors will be much bigger than that. All technologies stopped using actual transistor size (more precisely channel length) years ago as we moved away from planar transistors.

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